7.5‑inch E‑Paper Module – High Contrast E Ink Display

Product Details: JicTech 7.5‑Inch E‑Paper Display Module

Overview

The SE0750MNW11‑TNG‑A0 is an Active Matrix Electrophoretic Display (AM EPD) module designed for high‑visibility, low‑power applications such as digital shelf labels and information boards. With a 7.5‑inch diagonal active area and support for three colors (black, white, red), it provides clear, stable content without a backlight. The module integrates a complete driver system—including gate/source buffers, timing controller, DC‑DC converters, SRAM, and LUT—in a compact, ultra‑thin form factor, making it easy to embed in space‑constrained designs.

Key Features

Three‑Color Display: Black, White, and Red (BWR) for enhanced visual communication.
High Resolution: 800 × 480 pixels (124 DPI) for sharp text and graphics.
Ultra‑Low Power: Deep‑sleep current ≤3 µA; power only required during updates.
Slim Design: Module thickness of only 1.12 mm.
Integrated System: On‑chip waveform storage, temperature sensor interface, and internal voltage generation.
Flexible Interface: Configurable 4‑wire or 3‑wire SPI via BS1 pin.
Wide Viewing Angle & High Contrast: Pure reflective mode with anti‑glare hard coating.
Robust & Long‑Life: Commercial temperature range, RoHS compliant, and rated for 5+ years of operation.
COG Package: IC thickness of 280 µm for a compact footprint.

Applications

Electronic Shelf Labels (ESL) and retail price tags
Digital signage and wayfinding displays
Industrial and warehouse labeling
Smart office conference room boards
Public information kiosks

Technical Specifications

Category	Parameter	Specification	Unit	Conditions / Notes
General	Model Name	SE0750MNW11‑TNG‑A0	–	–
	Display Type	Active Matrix Electrophoretic Display (AM EPD)	–	BWR (Black‑White‑Red)
	Screen Size	7.5	Inch	–
	Resolution	800 (H) × 480 (V)	Pixels	124 DPI
	Active Area	163.20 × 97.92	mm	–
	Pixel Pitch	0.204 × 0.204	mm	Rectangle
	Outline Dimensions	170.20 (H) × 111.20 (V) × 1.12 (D)	mm	–
	Weight	42	g	–
Electrical	Logic Supply Voltage (VCI)	2.3 – 3.6 (Typ. 3.3)	V	–
	High‑Level Input Voltage (VIH)	0.7 × VDDIO	V	–
	Low‑Level Input Voltage (VIL)	0.3 × VDDIO	V	–
	High‑Level Output Voltage (VOH)	VDDIO – 0.4	V	@ IOH = 400 µA
	Low‑Level Output Voltage (VOL)	GND + 0.4	V	@ IOL = –400 µA
	Operating Current (Update)	To be defined (TBD)	mA	During image update
	Deep‑Sleep Current	≤3	µA	POWER OFF MODE, VCI = 3.3V
Optical	White State L* Value	62 – 65 (Typ. 65)	–	Measured with i‑One Pro
	Black State L* Value	Typ. 14	–	–
	Red State L* Value	25 – 28 (Typ. 28)	–	–
	Red State a* Value	36 – 40 (Typ. 40)	–	–
	Update Time	To be defined (TBD)	sec	–
	Panel Life	5 years	–	@ 0‑40°C, 45‑70% RH
Interface	Communication Interface	4‑wire SPI (BS1=L) or 3‑wire SPI (BS1=H)	–	Configurable via BS1 pin
	Temperature Sensor Interface	I²C (TSCL, TSDA)	–	Supports external sensor
	Busy Indicator	BUSY pin (active low)	–	–
Environmental	Operating Temperature	0 to 40	°C	45‑70% RH
	Storage Temperature	0 to 40	°C	Max 5 years
	Transportation Temperature	–25 to 60	°C	Within 10 days

Pin Assignment (24‑pin connector)

Pin	Name	I/O	Description	Pin	Name	I/O	Description
1	NC	–	Do not connect	13	SCL	I	Serial clock (SPI)
2	GDR	O	MOSFET gate drive control	14	SDA	I/O	Serial data (SPI)
3	RESE	I	Current sense input	15	VDDIO	P	Interface logic power
4	NC	–	Do not connect	16	VCI	P	Chip power supply
5	VSHR	C	Positive source voltage (red)	17	VSS	P	Ground
6	TSCL	O	I²C clock for temp sensor	18	VDD	C	Core logic power
7	TSDA	I/O	I²C data for temp sensor	19	VPP	P	Test pin
8	BS1	I	Bus interface selection	20	VSH1	C	Positive source voltage
9	BUSY	O	Busy output (active low)	21	VGH	C	Positive gate voltage
10	RES	I	Reset (active low)	22	VSL	C	Negative source voltage
11	D/C	I	Data/command control	23	VGL	C	Negative gate voltage
12	CS	I	Chip select (active low)	24	VCOM	C	VCOM driving voltage

Interface Timing (SPI)

Parameter	Write Mode	Read Mode	Unit
SCL Clock Frequency (max)	20	2.5	MHz
CS# Setup Time before SCL rising edge	20	100	ns
CS# Hold Time after SCL falling edge	20	50	ns
CS# High Time between transfers	100	250	ns
SCL High Time	25	180	ns
SCL Low Time	25	180	ns

Power Sequencing

Power‑On: Apply VDD/VDDIO → wait 10 ms → enable SPI → perform sensor init → load OTP → refresh display.
Power‑Off: Follow internal VSYNC frame → float VSHR, VSH, VSL, VGH, VGL, and VCOM lines → ensure BUSY_N is released.

Reliability & Environmental Testing

High‑Temp Operation: 50°C, 30% RH, 240 hours
Low‑Temp Operation: 0°C, 240 hours
Temperature Cycling: –25°C ↔ 60°C, 50 cycles
High‑Humidity Operation: 40°C, 90% RH, 168 hours
ESD Protection: HBM 330 Ω, 150 pF; Air ±4 kV, Contact ±2 kV
Vibration & Drop: 1.04G, 20‑200 Hz, 30 min per axis; 100 cm drop on concrete

Quality & Inspection Standards

Sampling Plan: GB/T 2828.1‑2012, Level II, AQL MA=0.4, MI=0.65
Viewing Conditions: 300 mm distance, 600‑1200 lux, 19‑25°C, 55±5% RH
Defect Classification: Spot size, line defects, scratches, bubbles, and chipping defined for Part‑A (active area) and Part‑B (border area).

Handling & Safety Notes

Handle with care; glass is fragile and may break if dropped.
Avoid exposure to harmful gases, moisture, and extreme temperatures.
Do not stack modules or apply pressure to the active area.
Clean only with petroleum benzene or normal‑hexane; avoid acetone, toluene, and alcohol.
Store flat, face‑up, in white screen state; refresh every three months if stored long‑term.

Package Includes

7.5‑inch E‑Paper display module (SE0750MNW11‑TNG‑A0)
24‑pin connector interface
Reference schematic for SPI interface

Ordering Information

Model: SE0750MNW11‑TNG‑A0
Version: V0.1 (Preliminary Specification)
Interface: 24‑pin FPC
Compliance: RoHS
Customization: Available for volume orders

Note: Specifications are based on preliminary datasheet V0.1 and are subject to change. For design‑in support, custom configurations, or reliability requirements, please contact JicTech technical sales.